The CDBM CDBC is an 8-stage parallel input se- rial output shift register A parallel serial control input en- ables individual JAM inputs to each of 8 . Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise . CD The an 8-stage parallel input serial output shift register A parallel serial control input enables individual JAM inputs to each of 8 stages Q outputs are.

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CDBE with buttons and leds Q8.

Basically I’m duplicating what a MCU does but at very slow speed. MarkT on Oct 06, Here’s how I use the switches to duplicate what the MCU does: Clock falling doesn’t do a thing, as you would expect. Data Sheet for the CD I will never ask you to do anything that I wouldn’t do myself.

CD Datasheet(PDF) – TI store

I did this before with a 74HC shift register and it clarified for me how it functions, but with the CD it’s a different story. According to the output table image CD – Q8 output.


That is what the data sheet says, at least. CD BE – Understanding the truth table. Under these conditions, the chip does not advance these 8 bits at all and SER IN is completely ignored.

CD (BE) – Understanding the truth table

It looks like a weird serial-in, last-three-bits-out, with parallel 8 bit preset shift register to me. Here is it in English. While doing the tests I wrote down the output state of Q8. CD – Q8 output. Is this not happening? CDBE with buttons and leds.

Have you hit all pins with a logic probe to make sure they have the voltage you think they do? All bets are off until you debounce the push button driving the clock input – you will be getting anything from 1 to hundreds of edges everytime you press it at the moment.

In either case, after the clock rises, Q6, Q7, and Q8 are available on their respective output pins. What does Qn-1 do? Mechanical switches should never drive logic clocks directly for this reason! PE – LOW 6. CD – truth table. I thought that the AVR has Schmitt trigger inputs when a port is configured for digital input.


This is called a “preset” function.

JoeN on Oct 09, Input s n – LOW 5. Input s n – HIGH I did this with one of the 8 inputs and in another test with two inputs simultaneously 3. MarkT Brattain Member Posts: What does Q1 Internal mean?


I’ve found some code online but unfortunately it is not helpful for understanding how the shift register works. I’m not sure if this is the correct way to do it but I got some results that I don’t understand. JoeN Edison Member Posts: The first one was wrong, the 8 input switches should datashewt connected to VDD, not ground.

I read the truth table simply. I’ve just updated the schematic image. Q7 goes into Q8.